DDR RAM in Embedded Linux: DDR3, DDR4, DDR5, and LPDDR Types Explained

Embedded Linux boards almost always run from external DRAM. The SoC memory controller decides the generation. You cannot put DDR4 on a DDR3 controller, and Linux does not pick the type at runtime. U-Boot, TF-A, or the vendor SPL trains the DRAM, then Linux just sees RAM.

This guide covers the DRAM types you actually meet on ARM boards, the names on datasheets, and which popular CPUs use which one. For how much RAM to fit, see Embedded Linux RAM Requirements.

DDR vs LPDDR in one sentence

DDR is standard double-data-rate SDRAM, common on industrial boards as discrete chips. LPDDR is the low-power mobile variant, common on phones, Raspberry Pi, and compact SoMs. Both are DRAM. Neither is the on-chip SRAM used inside Cortex-M microcontrollers.

Linux does not care which family you used once the controller is trained. Power, cost, PCB difficulty, and the SoC pinout do.

Generations at a glance

Speed names are megatransfers per second, not the DRAM clock. DDR3-1600 is 1600 MT/s.

The SoC datasheet lists the legal combinations. A chip that “supports DDR4/LPDDR4” still needs the matching PCB, width, and timing.

DDR3 family

DDR3 is 1.5 V. DDR3L is 1.35 V and is the default on most remaining DDR3 Linux boards. DDR3U is 1.25 V and is rare. Some DDR3L parts also run at 1.5 V; check the DRAM datasheet before mixing voltages.

On 16-bit or 32-bit buses you usually solder two or four x16 chips. ECC, when present, is an extra chip or an ECC-capable controller, not a DIMM label like on a PC.

Typical ARM users:

• TI AM335x (BeagleBone Black): DDR3 / DDR3L
• ST STM32MP13 / MP15: DDR3, DDR3L, LPDDR2, or LPDDR3
• NXP i.MX 6 (Dual/Quad, UL): DDR3 / DDR3L, LPDDR2, or LPDDR3
• Allwinner H3 / H5 / A64: DDR3 / DDR3L
• AMD/Xilinx Zynq-7000: DDR3

DDR3 is still fine for modest Linux gateways. It is not a good choice for a new high-bandwidth design.

DDR4 family

DDR4 drops I/O voltage to 1.2 V and raises bandwidth. Embedded boards usually use soldered DDR4, not desktop DIMMs. DDR4 ECC exists on industrial and FPGA platforms when the memory controller has ECC.

LPDDR4 is the mobile equivalent. LPDDR4X is the same protocol with lower I/O voltage, so it uses less power at similar speed. Many “LPDDR4” SoMs are actually LPDDR4X.

Typical ARM users:

• Broadcom BCM2711 (Raspberry Pi 4): LPDDR4-3200
• Broadcom BCM2712 (Raspberry Pi 5): LPDDR4X-4267
• NXP i.MX 8M Mini / Nano / Plus: LPDDR4
• NXP i.MX 93: LPDDR4 / LPDDR4X
• TI AM62x / AM64x: DDR4 or LPDDR4
• Rockchip RK3566 / RK3568: DDR3, DDR4, or LPDDR4
• ST STM32MP2: LPDDR4 / LPDDR4X
• NVIDIA Jetson Nano: LPDDR4
• AMD/Xilinx Zynq UltraScale+: DDR4

If you are picking a 2020s Linux SoM for a new product, LPDDR4 or LPDDR4X is the common default.

DDR5 family

DDR5 is the standard/server line. LPDDR5 and LPDDR5X are the mobile line you will see first on compact embedded boards. LPDDR5X is a faster LPDDR5 derivative, not a different software model.

Typical ARM users:

• Rockchip RK3588: LPDDR4, LPDDR4X, or LPDDR5
• NXP i.MX 95: LPDDR4X or LPDDR5
• NVIDIA Jetson Orin: LPDDR5
• Qualcomm QCS6490 / newer Snapdragon compute: LPDDR4X or LPDDR5
• Some Versal / high-end application processors: DDR4, LPDDR4, or DDR5 depending on the part

You need DDR5-class DRAM when the SoC GPU, NPU, or camera pipeline is the bottleneck. For a UART-and-MQTT gateway, DDR4/LPDDR4 is usually enough.

What the SoC actually constrains

The memory controller fixes:

• Generation (DDR3 vs DDR4 vs LPDDR4, and so on)
• Bus width (16, 32, 64 bit are the usual embedded widths)
• Max rank count and density
• Optional inline ECC
• Max MT/s

You still choose:

• Density (512 MB, 1 GB, 2 GB, …)
• Discrete chips vs PoP vs a module
• Speed bin within the controller limit
• Commercial vs industrial temperature DRAM

A 32-bit LPDDR4-3200 bus has much more bandwidth than 16-bit DDR3-800. Capacity and bandwidth are different knobs.

Popular ARM CPUs and the DRAM they use

Exact options vary by package. Always read that SoC’s memory chapter, not a sibling part number.

Practical notes for Linux bring-up

• DRAM init happens before Linux. Wrong timings look like random crashes, not a kernel config error. See Debugging i.MX6 DDR Calibration for a real example.
• /proc/meminfo shows size, not DDR generation. Use the SoM manual, schematic, or U-Boot banner.
• Device tree describes the memory map. It does not magically switch DDR3 to DDR4.
• Refresh, temperature derating, and industrial DRAM matter more in the field than a slightly higher MT/s rating.
• ECC is a controller plus extra DRAM bits. Software ECC in Linux is not a substitute for DDR ECC on a safety-critical bus.

Quick decision guide

• Existing DDR3/DDR3L industrial board: keep it if bandwidth is enough.
• New compact Linux product: LPDDR4 or LPDDR4X is the usual match for i.MX 8/9, STM32MP2, AM62, Pi-class chips.
• NPU, 4K video, or RK3588/Orin class: plan for LPDDR5 if the SoC supports it.
• FPGA + Linux with ECC: DDR3 or DDR4 with an ECC-capable controller is still common.
• Never mix generations. Match voltage, width, and the exact parts the vendor trained.

Bottom line

Pick DRAM from the SoC memory controller, not from PC RAM habits.

• DDR3 / DDR3L: still on STM32MP1, AM335x, i.MX 6, older Allwinner.
• DDR4 / LPDDR4 / LPDDR4X: the current embedded Linux default (Pi 4/5, i.MX 8/93, AM62, RK3568).
• DDR5 / LPDDR5: for newer high-bandwidth SoCs (RK3588, i.MX 95, Jetson Orin).
• Linux sees RAM after firmware trains it. The type is a hardware and bootloader problem.